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  bu-65142 and bus-65142 series* the bus-65142 series is a com- plete dual redundant mil-std- 1553 remote terminal unit (rtu). the device is based upon two ddc custom ics, which includes two monolithic bi-polar low power trans- ceivers and one cmos protocol containing data buffers and timing control logic. it supports all 13 mode codes for dual redundant operation, any combination of which can be ille- galized. parallel data transfers are accom- plished with a dma type handshak- ing, compatible with most cpu types. data transfers to/from mem- ory are simplified by the latched command word and word count out- puts. error detection and recovery are enhanced by bus-65142 series spe- cial features. a 14-bit built-in-test word register stores rtu information, and sends it to the bus controller in response to the mode command transmit bit word. the bus-65142 series performs continuous on-line wraparound self-test, and provides four error flags to the host cpu. inputs are provided for host cpu con- trol of 6 bits of the rtu status word. its small hermetic package, -55c to +125c operating tempera- ture range, and complete rtu opera- tion make the bus-65142 ideal for most mil-std-1553 applications requiring hardware or microprocessor subsystems. mil-std-1553 dual redundant remote terminal hybrid features  complete integrated remote terminal including: ?dual low-power transceivers ?complete rt protocol  multiple ordering options; +5v (only), +5v/-15v, and +5v/-12v  direct interface to systems with no processor  radiation tolerant version available  space qualified version available  high reliability screening available data bus a data bus b transceiver encoder/ decoder bit processor transceiver encoder/ decoder bit processor protocol sequencer and control logic buffer transfer controls current word counter command latch status register error flags timing flags nbgt incmd biten staten gbr mess err rt fail hs fail rtadd err ill cmd (me) ss req adbc rt flag ss busy ss flag dat/cmd a5-a10 a0-a4 dtreq dtgrt dtack dtstr r/w db0-db15 buf ena m u x watchdog timeout ddc custom chip rt address + parity 16 mhz clock figure 1. bus-65142 series block diagram description ? 1988, 1999 data device corporation * ( note: bus-65142 is not recommended for new design, use bu-61703/05 simple system rt for new designs. bu-65142 is not recommended for new design, consult factory or local representative for more information)
2 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 table 1. bu-65142 and bus-65142/44 specifications (continued) v ma v ma ma ma ma v ma ma ma ma v ma ma ma ma v v v pf pf pf 0.4 0.4 0.4 50 50 10 logic (continued) v ol ! (i ol =-2ma) a9-a5(sa4-sa0), rtaderr, hsfail, dat/cmd, rtfail, biten, nbgt, gbr, me, staten v ol ! (i ol =2 ma) all other inputs v ol ! (i ol = 2ma) db15 - db0 (connected to a 45k ? pull-up ) c in (f = 1 mhz) c 0 (f = 1 mhz) c i0 (f = 1 mhz) units max typ min parameter 5.5 115 5.25 125 230 335 545 -14.25 60 108 160 255 -11.4 60 120 185 305 5.0 4.5 4.75 -15.75 -12.6 power supply requirements +5v logic power (bu-65142x1/2, bus-65142/43/44/45) current drain +5v (bu-65142x3) current drain  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle -15v (bu-65142x1, bus- 65142/44) current drain  idle  50% transmitter duty cycle  25% transmitter duty cycle  100% transmitter duty cycle -12v (bu-65142x2, bus-65143/45) current drain  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle table 1. bu-65142 and bus-65142/44 specifications v v ma ma a ma ma a v v v 0.7 0.2 0.2 20 0.4 0.4 20 2.4 0.04 0.04 2.4 2.4 2.4 logic v ih v il i ih (v ih =2.7v) ! bro ena, addre-addra(rtad4-rtad0), addrp (connect to 30k ? pull-up ) ! (v ih =2.7v) db15 - db0 (connect to a 45k ? pull-up ) ! (v ih 2.4v) all other inputs i il (vil=0.4v) ! bro ena, addre-addra(rtad4-rtad0), addrp (connect to 30k ? pull-up ) ! (v il =0.4v) db15 - db0 (connect to a 45k ? pull-up ) ! (v il = 0.7v) all other inputs v oh ! (i oh =-0.4ma) a9-a5(sa4-sa0), rtaderr, hsfail, dat/cmd, rtfail, biten, nbgt, gbr, me, staten v oh ! (i oh =-0.4ma) all other inputs v oh ! (i oh =-0.4ma) db15 - db0 (connected to a 45k ? pull-up ) vp-p vp-p mvp-p, diff mvp-p, diff nsec 9 27 10 +250 300 7 20 150 6 18 -250 100 transmitter differential output voltage ! direct coupled across 35 ? , measured on bus ! transformer coupled across 70 ? , measured on stub output noise, differential (direct coupled) output offset voltage, (transformer coupled across 70 ohms) rise/fall time kohm vp-p vp-p db v v v v v vp-p v 40 1.20 7.0 7.0 0.3 0.3 40.0 7.0 4.0 0.70 40 10 -0.5 -0.5 -18.0 -18.0 -0.5 receiver differential input impedance (dc to 1 mhz) differential input voltage input threshold level (direct coupled) cmrr (dc to 2 mhz) cmv (dc to 2 mhz) absolute maximum rating supply voltage logic +5v transceiver +5v -15v (bus-65142, bu-65142x1) -12v (bus-65143, bu-65142x1/2) receiver differential voltage logic voltage input range for +5v units max typ min parameter v v 0.5 4.0 logic (cont) (bu-65142 only) v oh ! (i oh = 6ma), vdd = 4.5v bu-65142 only v ol ! (i ol = 6ma), vdd = 4.5v bu-65142 only
3 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 w w w w w w w w w w w w w w w w w w w w w w w w 1.475 1.856 2.238 3.000 1.295 1.680 2.065 2.895 0.687 0.92 1.15 1.60 0.680 1.010 1.350 2.030 0.290 0.540 0.790 1.290 0.28 0.51 0.75 1.22 power dissipation (see note) total hybrid ! bu-65142x1/bus-65142/44  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle ! bu-65142x2/bus-65143/45  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle ! bu-65142x3  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle hottest die ! bu-65142x1/bus-65142/44  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle ! bu-65142x2/bus-65143/45  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle ! bu-65142x3  idle  25% transmitter duty cycle  50% transmitter duty cycle  100% transmitter duty cycle table 1. bu-65142 and bus-65142/44 specifications (continued) units max typ min parameter c/w c c c c 20 150 125 150 +300 -55 -55 -65 thermal  thermal resistance, junction-to- case, hottest die ( jc)  operating junction temperature  operating junction temperature (bu-65142 only)  storage temperature  lead temperature (soldering, 10 sec.) in (mm) in (mm) in (mm) in (mm) oz (g) physical characteristics size 78-pin kovar (bus-65142/43) 82-pin kovar flat pack (bus-65144/45) 78-pin ceramic qip (bu-65142d) 78-pin ceramic flat pack (bu-65142f) weight 1.87 x 2.10 x 0.25 (47.5 x 53.3 x 6.4) 1.61 x 2.20 x 0.181 (40.8 x 55.8 x 4.6) 1.80 x 2.10 x 0.21 (45.7 x 53.3 x 5.3) 1.80 x 2.10 x 0.21 (45.7 x 53.3 x 5.3) 1.7 (48.2) note (for table 1): power dissipation specifications assume a transformer coupled configuration, with external dissipation (while transmitting) of 0.14 watts for the active isolation transformer, 0.08 watts for the active coupling transformer, 0.45 watts for each of the two bus isolation resistors, and 0.15 watts for each of the two bus termi- nation resistors. table 2. bu-65142 series radiation specifications part number total dose single event upset single event latchup bu-65142 x1/x2 300k rad 5.3 x 10 -6 errors/device-day, (let threshold of 59 mev/mg/cm 2 ) immune bu-65142 x3 175k rad 5.3 x 10 -6 errors/device-day, (let threshold of 59 mev/mg/cm 2 ) immune
4 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 introduction the bus-65142 is a complete dual redundant remote terminal unit (rtu). it is fully compliant with mil-std-1553b and sup- ports all message formats. as shown in figure 1, it includes 2 transceivers and a custom chip containing 2 encoders, 2 bit processors, an rtu protocol sequencer and control logic, output latches, and buffers. with the addition of 2 data bus transform- ers, the bus-65142 is ready for connection to a mil-std-1553 data bus. data is transferred to and from the subsystem host cpu over a 16-bit parallel highway, which is isolated by a set of bi-direction- al buffers. all transfers are made with a dma type handshake sequence of request, grant and acknowledge. read/write and data strobes are provided to simplify interfacing to external ram. also simplifying the ram interface is the availability of a latched command word and an auto-incrementing word counter. these signals may be used as an address to map the data directly to and from ram. the bus-65142 allows the subsystem host cpu to control 6 of the bits in the rtu status word. of particular interest is the illegal command input which may be used to set the message error bit and illegalize any command word. the bus-65142 pro- vides four error flags to the subsystem host cpu for evaluating its condition. in addition a continuous on-line self-test is per- formed by the bus-65142 on every transmission. the last transmitted word of every message is wrapped around the decoder and compared with the actual word. any discrepancy is flagged as an error. timing interfacing the subsystem host cpu to the bus-65142 is simple and compatible with most microprocessors. figures 4 and 5 illustrate typical mil-std-1553 messages for transmit data and receive data. figures 6 and 7 illustrate rt to rt transfers. in each case nbgt identifies the start of the message, and incmd identifies that a command is being processed. the hand- shake sequence dtreq , dtgrt, and dtack is used to trans- fer each word over the parallel data highway. dtsrb and rd/wr are used to control transfers to ram memory. gbr identifies a ? good block received ? , when a received message has passed all validation checks and has the correct word count. b ufena (buffer enable) must be applied to enable the internal tri-state buffers. error flags four error flags are output to the subsystem to provide informa- tion on the condition of the bus-65142. the me (message error) line goes low if any of the fol- lowing error conditions exist: format error word count error invalid word sync error rt to rt address error t/r bit error. the r tf ail (remote terminal failure) line goes low whenever the results of a continuous wraparound self-test shows a discrepancy, or a transmitter watchdog timeout has occurred. the hsf ail (handshake failure) line goes low whenev- er the system does not issue a dtgr t in response to a dtreq before timing-out. the r t adr err (rt address error) line goes low when- ever the sum of the 5 address lines and parity lines show a parity error (the terminal will not respond to commands while this error condition exists). status register six inputs to the bus-65142 allow the subsystem host cpu to control bits in the rtu status word. the illegal command input may be used to set the message error bit in the status word and suppress the transmission of data to the bus controller. this line allows illegalization of any combination of commands. the latched command word may be connected to the address pins of an optional external prom, which would drive the illegal command line low when it identifies a command programmed as illegal. status register bit assignments the srq (subsystem request) line is used to set the status word service request bit. the adbc (accept dynamic bus control) line is used to set the status word bus control bit. the r tfla g (rt flag line) is used to set the status word terminal flag bit. the b usy (busy) line is used to set the status word busy bit, and inhibit subsystem requests for data. the ssfla g (subsystem flag) line is used to set the status word subsystem (fault) flag. built-in-test the bus-65142 contains a 14-bit built-in-test (bit) word regis- ter which stores information about the condition of the rtu. when a mode code is received to transmit the bit word, the con- tents of the bit register is transmitted over the 1553 bus. figure 2 shows the fault assigned to each bit in the bit word. conditions monitored are; transmitter timeouts, loop test failures, transmitter shutdown, subsystem handshake failure, and the results of individual message validations.
5 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 bus-65142 bus-65144 bu-65142d1 bu-65142f1 data bus z 0 (70 to 85 55 ? 55 ? 1.4:1 39 vpp 28 vpp 1 ft max 2:1 39 vpp 20 vpp 1 8 3 4 1:1.4 coupling transformer isolation transformer isolation transformer 0.75 z 0 0.75 z 0 transformer coupled (long stub) 20 ft max 28 vpp direct coupled (short stub) or coupling transformer isolation transformer isolation transformer direct coupled (short stub) bus-65143 bus-65145 bu-65142d2 bu-65142f2 55 ? 55 ? 1:0.83 33 vpp 28 vpp 1 ft max 1:0.6 33 vpp 20 vpp 1 8 3 4 1:1.4 0.75 z 0 0.75 z 0 transformer coupled (long stub) 20 ft max 28 vpp or coupling transformer isolation transformer isolation transformer direct coupled (short stub) bu-65142d3 bu-65142f3 55 ? 55 ? 1:2.5 11.6 vpp 28 vpp 1 ft max 1:1.79 11.6vpp 20 vpp 1 8 3 4 1:1.4 0.75 z 0 0.75 z 0 transformer coupled (long stub) 20 ft max 28 vpp or z 0 +5v -15v ?) +5v -12v +5v (70 to 85 ?) figure 2. interface to 1553 bus
6 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 transformer considerations for bu-65142x3 (+5v only versions) in selecting isolation transformers to be used for the bu- 65142x3 (+5v only) versions, there is a limitation on the maxi- mum amount of leakage inductance. if this limit is exceeded, the transmitter rise and fall times may increase, possibly causing the bus amplitude to fall below the minimum level required by mil- std-1553. in addition, an excessive leakage imbalance may result in a transformer dynamic offset that exceeds 1553 specifi- cations. the maximum allowable leakage inductance is 6.0 h, and is measured as follows: the side of the transformer that connects to the hybrid is defined as the ? primary ? winding. if one side of the primary is shorted to the primary center-tap, the inductance should be measured across the ? secondary ? (stub side) winding. this inductance must be less than 6.0 h. similarly, if the other side of the pri- mary is shorted to the primary center-tap, the inductance mea- sured across the ? secondary ? (stub side) winding must also be less than 6.0 h. the difference between these two measurements is the ? differential ? leakage inductance. this value must be less than 1.0 h. beta transformer technology corporation (bttc), a subsidiary of ddc, manufactures transformers in a variety of mechanical configurations with the required turns ratios of 1:2.5 direct cou- pled, and 1:1.79 transformer coupled. table 3 provides a listing of many of these transformers. dlp-7014 slp-8007 slp-8024 not recommended lpb-5015 b-3310 hlp-6015 dual epoxy transformer, side by side, surface mount, 0.930" x 0.630", 0.155" max height dlp-7115 (see note 1) dual epoxy transformer, side by side, surface mount, 1.410" x 0.750", 0.130" max height single metal transformer, hermetically sealed, surface mount, 0.630" x 0.630", 0.175" max height b-3261 hlp-6014 dual epoxy transformer, side by side, flat pack, 0.930" x 0.630", 0.155" max height single metal transformer, hermetically sealed, flat pack, 0.630" x 0.630", 0.175" max height b-3300 dual epoxy transformer, side by side, through-hole, 0.930" x 0.630", 0.155" max height tst-9027 dual epoxy transformer, twin stacked, flat pack, 0.625" x 0.625", 0.280" max height tst-9017 dual epoxy transformer, twin stacked, surface mount, 0.625" x 0.625", 0.280" max height tst-9007 dual epoxy transformer, twin stacked, 0.625" x 0.625", 0.280" max height b-3819 lpb-5014 single epoxy transformer, surface mount, hi-temp solder, 0.625" x 0.625", 0.220" max height. may be used with bu-65142x4 versions. single epoxy transformer, flat pack, 0.625" x 0.625", 0.150" max height b-3227 single epoxy transformer, surface mount, 0.625" x 0.625", 0.275" max height b-3231 single epoxy transformer, flat pack, 0.625" x 0.625", 0.275" max height b-3818 b-3067 b-3226 single epoxy transformer, through-hole, 0.625 x 0.625, 0.220" max height may be used with bu-65142x4 versions. single epoxy transformer, through-hole, 0.625 x 0.625, 0.250" max height bttc part no. transformer configuration single epoxy transformer, surface mount, 0.625" x 0.625", 0.150" max height table 3. bttc transformers for use with bu-65142x3 notes: 1. dlp-7115 operates at +105 c max. b-3229 single epoxy transformer, through hole, transformer coupled only, 0.500 ? x 0.350 ? , 0.250 ? max height.
7 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 figure 2. built-in-test (bit) word register data sync 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 p channel a/b - transmitter timeout handshake failure channel a/b - loop test failure mode code - t/r error { illegal or reserved mode code illegal use of broadcast with mode code message servicing aborted due to low word count message servicing aborted due to high word count non-mode broadcast command to transmit always zero channel b - transmitter timeout channel b - loop test failure channel b - transmitter shutdown channel a - loop test failure channel a - transmitter shutdown channel a - transmitter timeout 1. bits 3-7 are cleared in the beginning of each new message and updated at the end of the message. they only reflect the present command word. 2. bits 0-2 and 10-13 are latched and only cleared by a mode reset command or a master reset (reset). notes 3. bits 8 and 9 are set only by the mode command for "transmitter shutdown" and are cleared by the mode command for "override transmitter shutdown" or "reset remote terminal". bits 8 and 9 are also cleared by reset. { note: the b-2204, b-2388, and 2344 transformers have a slightly different turns ratio on the direct coupled taps than the turns ratio of the bus- 29854 direct-coupled taps. they do, however, have the same transformer coupled ratios. for transformer coupled applications, eith er transformer may be used. the transceiver in the bus-65143, bus-65145, bu-65142d2, and bu-65142f2 was designed to work with a 1:0.83 ratio fo r direct- coupled applications. for direct-coupled applications, the 1:0.83 turns ratio is recommended, but the 1.25:1 may be used. the 1.2 5:1 turns ratio will result in a slightly lower transmitter amplitude (approximately 3.6% lower) and a slight shift in the rt ? s receiver threshold. table 4 isolation transformer guide b-2388, desc m21038/27 -13, b-2334, desc m21038/27 -18 bus-29854 1.0:83 surface mount b-2387, b-2343, desc m21038/27 -12, m21038/27 -17 lpb-5002 lpb-5009 lpb-6002 lpb-6009 lpb-5001 lpb-5008 lpb-6001 lpb-6008 recommended xformer plug-in bus-25679, b-2203, desc m21038/27-02 b-2204,desc m21038/27-03 xformer coupled 2:1 1:0.67 1.25:1 (see note) bus-65143 bus-65145 bu-65142d2 bu-65142f2 1.41:1 bus-65142 bus-65144 bu-65142d1 bu-65142f1 direct coupled rt part number turns ratio
8 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 1514 13 12 1110 9 8 7 6 5 4 3 2 1 0 p 1514 13 12 1110 9 8 7 6 5 4 3 2 1 0 p cmo 1553 bus 3.4.5s 1.1.2s status 10.5.5s nbgt incmd dtreq dtack 100-150ns 825-925 2.1s max 200ns min 300ns max 100-150ns 100-150ns 450-550ns 200-400ns note 7 100ns max 4.8s 100ns min 50ns min 475-550ns 475-550ns 50ns min 225-275ns dtgrt is recognized status inputs strobed in 250ns min setup time hold time 600ns min srq busy ssflag adbc rtflag start of new command word initialization a10-a0 are valid (command word) command word transfer to subsystem illcmd strobed in a4-a0 0(current word counter) rtu requests data bus for command word transfer status word transferred to encoder registers no more continuous data encoder started up encoder registers available for next word rtu requests data bus for 1st data word transfer (rtfail is cleared if it was set) 825-925ns 2.2sec note 7 100ns max 100ns max command word subaddress field command word count = 00000 50ns min dtgrt r/w dtsrt a10(t/r bit) dat/cmd previous message a9-a5 previous subaddress previous word count word count a4-a0 d15-d0 staten biten hs fail rt fail 100ns max 9.35 transmit 2 words figure 4. transmit timing diagram
9 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ 151413 12 1110 9 8 7 6 5 4 3 2 1 0 p data data 15 14 1312 1110 9 8 7 6 5 4 3 2 1 0 p 200ns min 200ns min 4.7.3 max 1.1.2s 300ns max max 100-150ns 100ns max 225-275ns 475-550ns 50ns min 100ns max 300ns max 9.35s max 100-150ns current word count = 00010 current word count = 00001 note 7 note 7 dtgrt is recognized data transfer starts, subsystem should be driving the data bus internal data buffers are now inputs 1st data word transfer internal data buffers are now inputs 2nd data word transfer subsystem data must be valid 50ns min dtgrt is recognized data transfer starts, subsystem should be driving the data bus encoder registers available for next word rtu requests data bus for 2nd data word transfer subsystem data must be valid 225-275ns 475-550ns 1. legend don't care data bus undefined 2. each word is driven for ? 18-19s on d15-d05. if buf ena is active the last word is available for 3.5-4s since the status word must be supported. 3. data bus is shown with buf ena connected to dtack (see pin function table, pin 67) 4. the position of dtack will vary depending on when dtgrt is issued; the time will be 100ns min to 150ns max from dtgrt. 5. hsfail is asserted upon excess dtgrt response time. incmd will subsequently go low, and no further data transfers will occur. 6. rtfail is cleared when the status word is transmitted. once set, flag will remain set for the entire message. the incmd falling edge can be used to latch rtfail status. 7. 100ns min represents setup time for valid data before dtstr goes low for a write cycle. a read cycle requires valid data 160 ns max after dtack goes low notes
10 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ 1553 bus cmd 151413121110 9 8 7 6 5 4 3 2 1 0 p data 151413 12 1110 9 8 7 6 5 4 3 2 1 0 p data 15141312 1110 9 8 7 6 5 4 3 2 1 0 p receive 2 words 3.4 5 s 3.5 5 s 300ns max 100-150ns 200ns min 3.4 5 s 10.5 5 s ~ ~ nbgt incmd dtreq dtgrt dtack r/w dtstr a10 (t/r bit) dat/cmd a9-a5 200-400ns prev sub previous word count command word subaddress field a4-a0 d15-d0 staten gbr biten me hs fail rtfail start of new command word initialization a10-a0 are valid (command word) illcmd strobed in a4-a0 0 (current word counter) rtu requests data bus for command word transfer 200ns min 100-150ns 825-925ns 100-150ns 100-150ns 2.85s max 2.1s max 300ns max 50ns min 450-550ns previous message word count note 7 100ns max 100ns max current word count = 00000 100ns max 100ns max 825-925ns command word transfer to subsystem 475-550ns 475-550ns rtu data valid 225-275ns 50ns min 50ns min 225-275ns 1st data word is received & validated rtu requests data bus for data word transfer status inputs strobed in dtgrt is recognized note 7 100ns max 250ns min setup time hold time 600ns min srq busy ssflag adbc rtflag dtgrt is recognized data transfer starts 1st data word transfer figure 5. receive timing diagram
11 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ 15141312 1110 9 8 7 6 5 4 3 2 1 0 p status 4.7.3 max 1.1.2s 200ns min 300ns max 100-150ns 100-150ns 2.85s max current word count = 00001 current word count = 00010 note 7 note 7 100ns max 100ns max 4.5s 225-275ns 225-275ns 2nd data word received & validated rtu requests data bus for data word transfer 50ns min 50ns min rtu data valid 475-550ns 475-550ns 2nd dataword transfer status word transferred to encoder registers dtgrt is recognized data transfer starts no more continuous data encoder started up rt fail is cleared if it was set 1. legend don't care data bus undefined represents the sequence of events if the command was broadcast. note: no status would be transmitted on 1553 bus. 2. each word is driven for ? 18-19s on d15-d0. if buf ena is active the last word is available for 3.5-4s since the status word must be supported. 3. data bus is shown with buf ena connected to dtack (see pin function table, pin 67) 4. the position of dtack will vary depending on when dtgrt is issued; the time will be 100ns min to 150ns max from dtreq 5. hsfail is asserted upon excess dtgrt response time. gbr will not be set. 6. rtfail is cleared when the status word is transmitted. once set, flag will remain set for the entire message. the incmd falling edge can be used to latch rtfail status. 7. 100ns min represents setup time for valid data before dtstr goes low. notes
12 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 cmd 151413121110 9 8 7 6 5 4 3 2 1 0 p data 151413 12 1110 9 8 7 6 5 4 3 2 1 0 p status15 1413121110 9 8 7 6 5 4 3 2 1 0 p data 151413 12 1110 9 8 7 6 5 4 3 2 1 receive command transmit command transmitting rt response time 1 553 bus 3.4.5s 3.5.5s 3.5.5s nbgt incmd dtreq dtgrt dtack r/w dtstr (t/r bit) dat/cmd a9-a5 a4-a0 d15-d0 staten gbr biten me hs fail rtfail 475-550ns status inputs strobed in srq busy ss flag adbc rt flag 50ns min 2.2sec 225-275ns 450-550ns 825-925ns previous word count previous subaddress previous message word count 100-150ns 50ns min 100-150ns 2.1s max 200ns min 300ns max note 6 note 6 note 6 command word subaddress field current word count = 00000 100ns max 100-150ns 100-150ns 100-150ns a10-a0 are valid (command word) start of new command word initialization dtgrt is recognized command word transfer to subsystem illcmd strobed in a4-a0 0(current word counter) rtu requests data bus for command word transfer 250ns min setup time hold time 600ns min transmitting rt address is latched t/r bit is verified transmitting rt status word address is checked 1st data word is received & validated rtu requests data bus for data word transfer figure 6. rt to rt (receive) timing diagram
13 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 15 data 1413121110 9 8 7 6 5 4 3 2 1 0 p 15 status 141312 1110 9 8 7 6 5 4 3 2 1 0 p 200ns min 300ns max 2.85s max 225-275ns 100-150ns 100ns max 100ns max 100ns max 50ns min 475-550ns 1st data word transfer dtgrt is recognized data transfer starts 225-275ns note6 rtu data valid 2nd data word is received & validated rtu requests data bus for data word transfer 50ns min 4.5s 50ns min 475-550ns 475-550ns 2nd data word transfer status word transfer to encoder registers no more continuous data encoder started up rt fail is cleared if it was set dtgrt is recognized data transfer starts 225-275ns 225-275ns rtu data valid note6 note6 current word count = 00010 current word count = 00001 100-150ns 225-275ns 300ns max 200ns min 3.5.5s 10.5.5s 1.12s 4.7.3s 100-150ns 2.85s max 0 p 0p 2. each word is driven for ? 18-19s on d15-d0. if buf ena is active the last word is available for 3.5-4s since the status word must be supported. 3. data bus is shown with buf ena connected to dtack (see pin function table, pin 67) 4. the timing diagram represents a dtgrt response time of 0.92s for command transfer and 2.1s for data. the maximum response time from dtreq to dtgrt to guarantee a successful transfer is 1.5s for the command transfer and 2.33s for data transfer to the subsystem. the position of dtack will vary depending on when dgrt is issued 5. rtfail is cleared when the status word is transmitted. once set, flag will remain set for the entire message. the incmd falling edge can be used to latch rtfail status. 6. 100ns min represents setup time for valid data before dtstr goes low. 1. legend don't care data bus undefined represents the sequence of events if the command was broadcast. note: no status would be transmitted on 1553 bus. notes
14 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 cmd 151413121110 9 8 7 6 5 4 3 2 1 0 p data 151413 12 1110 9 8 7 6 5 4 3 2 1 0 p 1553 bus receive command transmit command transmit 2 words status151413121110 9 8 7 6 5 4 3 2 1 0 p 10.5.5s 3.4.5s 300ns max 2.1s max 100-150ns 100-150ns 100-150ns note 6 note 6 note 6 word count 100ns max 100ns max 100ns max 9.35 50ns min 200-400ns previous message previous subaddress previous word count 100-150ns 1.1.2s nbgt incmd dtreq dtgrt dtack r/w dtstr a10(t/r bit) dat/cmd a9-a5 a4-a0 d15-d0 staten gbr biten hs fail rtfail me command word subaddress field command word count 00000 450-550ns 475-550ns 225-275ns 50ns min 475-550ns 225-275ns 825-925ns 2.2sec 4.8s 50ns min dtgrt is recognized command word transfer to subsystem status inputs strobed in srq busy ss flag adbc rt flag 250ns min setup time hold time 600ns min illcmd strobed in a4-a0 0(current word counter) rtu requests data bus for command word transfer start of new command word initialization a10-a0 are valid (command word) status word transferred to encoder registers no more continuous data encoder started up encoder registers available for next word rtu requests data bus for 1st data word transfer (rtfail is cleaned if it was set) figure 7. rt to rt (transmit) timing diagram
15 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 data 151413121110 9 8 7 6 5 4 3 2 1 0 p data 151413 12 1110 9 8 7 6 5 4 3 2 1 0 p status15 141312 1110 9 8 7 6 5 4 3 2 1 0 p 4-12s receiving at response time 4.7.3s 1.1.2s 225-275ns 475-550ns dtgrt is recognized data transfer starts, subsystem should be driving the data bus internal data buffers are now inputs 1st data word transfer subsystem data must be valid encoder registers available for next word rtu requests data bus for 2nd data word transfer internal data buffers are now inputs 2nd data word transfer subsystem data must be valid 50ns min 50ns min dtgrt is recognized data transfer starts, subsystem should be driving the data bus 225-275ns 475-550ns 100ns max note 6 current word count=00001 100-150ns 300ns max s max 9.35s max 300ns max 100-150ns current word count=00010 100ns max note 6 2. each word is driven for ? 18-19s on d15-d0. if buf ena is active the last word is available for 3.5-4s since the status word must be supported. 3. data bus is shown with buf ena connected to dtack (see pin function table, pin 67) 4. the maximum response time from dtreq to dtgrt to guarantee a successful transfer is 2.1s from the command word and 9.35s from the data transfer from the subsystem. the position of dtack will vary depending on when dgrt is issued. the time will be 100ns min to 150ns from dtreq. 5. rtfail is cleared when the status word is transmitted. once set, flag will remain set for the entire message. the incmd falling edge can be used to latch rtfail status. 6. 100ns min represents setup time for valid data before dtstr goes low for a write cycle. a read cycle requires valid data 150ns max after dtack goes low. 1. legend don't care data bus undefined represents the sequence of events if the command was broadcast. note: no status would be transmitted on 1553 bus. notes
16 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 the appropriate i/o signals. mode command illegalization and handling are detailed below in table 5. mode codes the bus-65142 implements all mode codes applicable to dual- redundant systems. mode codes can also be illegalized using table 5. mode codes implemented dynamic bus control (00000) message sequence = dbc * status the rt responds with status. if the subsystem wants control of the bus, it must set dbacc in the configuration register. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word). 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, t/r error (bit word). 5. broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code (bit word). synchronize without data word (00001) message sequence = sync * status the rt responds with status. if sent as a broadcast, the broadcast receive bit will be set and status response suppressed. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, t/r error (bit word). status word (00010) message sequence = transmit word * status the status and bit word registers are not altered by this command and contain the status from the previous command. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, t/r error (bit word). 5. broadcast address. no status response. bits set: message error, broadcast received (s/w), t/r error (bit word). initiate self-test (00011) message sequence = self test * status the rt responds with a status word. if the command was broadcast, the broadcast received bit is set and status transmission supp ressed. short-loop test is initiated on the status word transmitted. if the test fails, an rt fail flag is set. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), t/r error (bit word). 5. fault test. bits set: terminal flag (s/w), loop test fail, current 1553 bus (a or b) loop test fail (bit word) b / a transmitter shutdown (00100) message sequence =shutdown * status this command is only used with dual redundant bus systems. the rt responds with status. at the end of the status transmission, th e rt inhibits any further transmission from the dual redundant channel. once shutdown, the transmitter can only be reactivated by override tra nsmitter shutdown or reset rt commands. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, t/r error (bit word). * = status response time
17 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 reserved mode command (01001-01111) message sequence = reserved mode command * status the rtu responds with clear status and no data. if the command is illegalized through an optional prom, the message error bit is set and only the status word is transmitted. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word). 3. t/r bit set to zero. no status response. bits set: message error (s/w), illegal mode code (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code (bit word). reset remote terminal (01000) message sequence = reset remote terminal * status the rtu responds with status and internally resets. transmitter shutdown, mode commands, bit word, and inhibit terminal flag com mands will be reset. if the command was broadcast, the broadcast received bit is set and the status word is suppressed. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word). 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), t/r error (bit word). override inhibit terminal flag bit (00111) message sequence = override inhibit terminal flag * status the rtu responds with status and reactivates the terminal flag bit in the status register. if the command was broadcast, the bro adcast received bit is set and status transmission is suppressed. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), t/r error (bit word). inhibit terminal flag bit (00110) message sequence = inhibit terminal flag * status the rtu responds with status and inhibits further internal or external setting of the terminal flag bit in the status register. once the terminal flag has been inhibited, it can only be reactivated by an override inhibit terminal flag or reset rt command. if the command was broa dcast, the broadcast received bit is set and status transmission is suppressed. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), t/r error (bit word). override transmitter shutdown (00101) message sequence = override shutdown * status this command is only used with dual redundant bus systems. the rtu responds with status. at the end of the status transmission, th e rtu re- enables the transmitter of the redundant bus. if the command was broadcast, the broadcast received bit is set and status transmi ssion is sup- pressed. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error, broadcast received (s/w), t/r error (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, t/r error (bit word). table 5. mode codes implemented (continued) * = status response time
18 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 table 5. mode codes implemented (continued) transmit vector word (10000) message sequence = transmit vector word * status vector word the rtu transmits a status word followed by a vector word. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count (bit word) 3. t/r bit set to zero. no status response. bits set: message error (s/w),low word count (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, t/r error, low word count (bit word). 5. broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, (bit word). synchronize with data word (10001) message sequence = synchronize with data word * status the data word received following the command word is transferred to ram. the status word is then transmitted. if the command was broadcast, the broadcast received bit is set and status transmission is suppressed. error conditions 1. invalid command. no response, command ignored. 2. command not followed by data word. no status response. bits set: message error (sw), low word count (bit word) 3. command followed by too many data words. no status response. bits set: message error (sw), high word count (bit word) 4. command t/r bit set to one. no status response. bits set: message error (s/w), t/r error, high word count (bit word). 5. command t/r bit set to zero and broadcast address. no status response. bits set: message error, broadcast received (s/w), high word count, t/r error (bit word). transmit last command (10010) message sequence = transmit last command * status the status and bit word registers are not altered by this command. the sw contains the status from the previous command. the data word transmitted contains the previous valid command (providing it was not another transmit last command). error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw). 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error, low word count (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error (s/w), illegal mode code, t/r error (bit word). 5. broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code (bit word). transmit bit word (10011) message sequence = transmit bit word * status the rtu responds with status followed by the bit word. the bit word is not altered by this command; however, the next sw will ref lect errors in this transmission. error conditions 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw). 3. t/r bit set to zero. no status response. bits set: message error (s/w), t/r error, low word count (bit word). 4. zero t/r bit and broadcast address. no status response. bits set: message error (s/w), illegal mode code, t/r error, low word count (bit word). 5. broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code (bit word) * = status response time
19 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 undefined mode codes (t/r = 0, mode codes 00000 to 01111) no response, set message error bit. reserved mode codes (10110-11111) message sequence = reserved mode code (t/r = 1) * status reserved mode code (t/r = 0) * status if valid (t/r = 0) the rtu responds with status. if the command was broadcast, the broadcast received bit is set and status transmission is suppres sed. if the com- mand is illegalized through an optional prom, the message error bit is set and only the status word is transmitted. if valid (t/r = 1) respond with status and one data word. error conditions (t/r = 1) 1. invalid command. no response, command ignored. 2. command followed by data word. no status response. bits set: message error (sw), high word count, illegal mode code (bit word). error conditions (t/r = 0) 1. invalid command. no response, command ignored. 2. command not followed by contiguous data word. no status response. bits set: message error (s/w), low word count, illegal mode code (bit word). 3. command followed by too many data words. no status response. bits set: message error (s/w), high word count, illegal mode code (bit word). override selected transmitter shutdown (10101) message sequence = override selected transmitter shutdown * status the data word received after the command is transferred to the subsystem. no other action is taken by the rtu. if the command was broadcast, the broadcast received bit is set and status transmission suppressed. error conditions 1. invalid command. no response, command ignored. 2. command not followed by data word. no status response. bits set: message error (sw), low word count, illegal mode code (bit word) 3. command followed by too many data words. no status response. bits set: message error (sw), high word count, illegal mode code (bit word) 4. command t/r bit set to one. no status response. bits set: message error (s/w), illegal mode code, high word count (bit word). 5. command t/r bit set to one and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, high word count, t/r error (bit word). selected transmitter shutdown (10100) message sequence = selected transmitter shutdown * status vector word the data word received is transmitted to the subsystem and status is transmitted. no other action is taken by the rtu. if the com mand was broadcast, the broadcast received bit is set and status transmission suppressed. intended for use with rt ? s with more than one dual redundant channel. error conditions 1. invalid command. no response, command ignored. 2. command not followed by data word. no status response. bits set: message error (sw), high word count, illegal mode code (bit word) 3. command followed by too many data words. no status response. bits set: message error (sw), low word count, illegal mode code (bit word) 4. command t/r bit set to one. no status response. bits set: message error (s/w), illegal mode code, high word count (bit word). 5. command t/r bit set to one and broadcast address. no status response. bits set: message error, broadcast received (s/w), illegal mode code, high word count (bit word). table 5. mode codes implemented (continued) * = status response time
20 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 data transfer grant -- active low input signal from the subsystem that informs the rt, when dtreq is asserted, to start the transfer. once transfer is started, dtgrt can be removed. table 6. pin functions 82- pin flat- pack function package & pin description 1 2 1 a9 (sa4) latched output of the most significant bit (msb) in the subaddress field of the command word. 4 2 a7 (sa2) 3 latched output of the third most signifi- cant bit in the subaddress field of the command word. 6 3 a5 (sa0) 5 latched output of the least significant bit (lsb) in the subaddress field of the command word. 8 4 db1 7 bi-directional parallel data bus bit 1 10 5 db3 9 bi-directional parallel data bus bit 3 12 6 db5 11 bi-directional parallel data bus bit 5 14 7 db7 13 bi-directional parallel data bus bit 7 16 8 db9 15 bi-directional parallel data bus bit 9 18 9 db11 17 bi-directional parallel data bus bit 11 20 10 db13 19 bi-directional parallel data bus bit 13 22 11 db15 21 bi-directional parallel data bus bit 15 (msb) 24 12 bro ena 23 26 13 addre (rtad4) 25 input of the msb of the assigned termi- nal address. 28 14 27 input of the 3rd msb of the assigned terminal address. 30 15 addra (rtad0) 29 input of the lsb of the assigned termi- nal address. 32 16 rtaderr 31 output signal used to inform subsystem of an address parity error. if low, indi- cates parity error and the rt will not respond to any command address to a single terminal. it will respond to broad- cast commands if bro ena is high. 34 17 txdata b 33 low output to the primary side of the coupling transformer that connects b channel of the 1553 bus. 36 18 nc 35 38 19 gnd b 37 power supply return connection for the b channel transceiver. 40 20 rxdata b 39 79 81 22 21 a1 (wc1/ cwc1) a3 (wc3/ cwc3) 76 78 multiplexed address line output. when incmd is low or a5 thru a9 are all zeroes or all ones (mode command), it represents the latched output of the 2nd lsb in the word count field of the com- mand word. when incmd is high and a5 thru a9 are not all zeroes or all ones, it represents the 2nd lsb of the current word counter. multiplexed address line output. when incmd is low or a5 thru a9 are all zeroes or all ones (mode command), it represents the latched output of the 2nd msb in the word count field of the com- mand word. when incmd is high and a5 thru a9 are not all zeroes or all ones, it represents the 2nd msb of the current word counter. input from the low side of the primary side of the coupling transformer that con- nects to the a channel of the 1553 bus. rxdata a 51 built-in-test word enable--low level output pulse (.5s), present when the built-in-test word is enabled on the parallel data bus. biten 53 subsystem service request-- input from the subsystem used to control the service request bit in the status register. if low when the status word is updated, the service request bit will be set; if high, it will be cleared. ss req 55 illegal command--active low input signal from the subsystem, strobed in on the ris- ing edge of incmd. used to define the command word as illegal and to set the message error bit in the status register. illcmd 57 latched output of the t/r bit in the com- mand word. a10 (t/r ) 59 test 2 61 accept dynamic bus control-- active low input signal from the subsystem used to set the dynamic bus control acceptance bit in the status register if the command word was a valid, legal mode command for dynamic bus control. adbc 63 data transfer request --active low out- put signal to the subsystem indicating that the rt has data for or needs data from the subsystem and requests a data trans- fer over the parallel data bus. will stay low until transfer is completed or transfer timeout has occurred. dtreq 65 remote terminal failure-- latched active low output signal to the subsystem to flag detection of a remote terminal contin- uous self-test failure. also set if the watchdog timeout circuit is activated. cleared by the start of the next message transmission (status word) and set if prob- lem is again detected. rtfail 67 address line output that is low whenever the command word is being transferred to the subsystem over the parallel data bus, and is high whenever data words are being transferred. (dat/cmd) 69 a low level output pulse (166ns) present in the middle of every data word transfer over the parallel data bus. used to latch or strobe the data into memory, fifos, registers, etc. recommended using the rising edge to clock data in. dtstr 71 hsfail 73 in-command -- high level output signal used to inform the subsystem that the rt is presently servicing a command. incmd 75 77 dtgrt 48 36 50 35 52 34 54 33 56 32 58 31 60 30 62 29 64 28 66 27 68 26 70 25 72 24 23 74 function 78- pin flat- pack table 6. pin functions (continued) description package & pin 82- pin flat- pack 78- pin flat- pack broadcast enable - when high, this input allows recognition of an rt address of all ones in the command word as a broadcast message. when low, it prevents response to rt address 31 unless it has the assigned terminal address. input from the high side of the primary side of the coupling transformer that connects to the b channel of the 1553 78- pin qip 78- pin qip addrc (rtad2) factory test point output-do not use (see note 1)* handshake fail-- output signal that goes low and stays low whenever the sub- system fails to supply dtgrt in time to do a successful transfer. cleared by the next nbgt.
21 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 remote terminal flag--input signal used to control the terminal flag bit in the status regis- ter. if low when the status word is updated, the terminal flag bit would be set; if high, it would be cleared. normally connected to r tf ail . multiplexed address line output. when incmd is low or a5 thru a9 are all zeroes or all ones (mode command), it represents the latched output of the 3rd msb in the word count field of the com- mand word. when incmd is high and a5 thru a9 are not all zeroes or all ones, it represents the 3rd msb of the current word counter. input from the low side of the primary side of the coupling transformer that connects to the b channel of the 1553 bus. +5 v input power supply connection for the b channel transceiver. high, output to the primary side of the coupling transformer that connects to the b channel transceiver. input of address parity bit. the combi- nation of assigned terminal address and addrp must be odd parity for the rt to work. input of the 2nd lsb of the assigned terminal address. input of the 2nd msb of the assigned terminal address. power supply return for rtu digital logic section. +5v input power supply connection for rtu digital logic section. a2 (wc2/ csw2) rxd a t a b +5vb -vb txdata b addrp addrb addrd gnd +5v 80 39 37 35 33 31 29 27 25 23 bi-directional parallel data bus bit 14 db14 21 bi-directional parallel data bus bit 12 db12 19 bi-directional parallel data bus bit 10 db10 17 bi-directional parallel data bus bit 8 db8 15 bi-directional parallel data bus bit 6 db6 13 bi-directional parallel data bus bit 4 db4 11 bi-directional parallel data bus bit 2 db2 9 bi-directional parallel data bus bit 0 (lsb) db0 7 latched output of the 2nd lsb in the subaddress field of the command word. a6 (sa1) 5 latched output of the 2nd msb in the subaddress field of the command word. a8 (sa3) 3 new bus grant -- low level output pulse (166ns) used to indicate the start of a new protocol sequence in response to the command word just received. nbgt 43 high output to the primary side of the coupling transformer that connects to the a channel of the 1553 bus. txdata a 45 -15v/-12v input power supply connec- tion for the bus-65142/43/44/45 and bu-65142x1/2 a channel transceiver (no connection for bu-65142x3). +5v input power supply connection for the a channel transceiver. -va +5va 47 49 77 38 36 34 32 30 28 26 24 22 60 59 58 57 56 55 54 53 52 51 20 50 18 49 16 48 14 47 12 46 10 45 8 44 6 43 4 42 2 41 40 40 42 39 38 37 44 46 function 78- pin flat- pack description package & pin 82- pin flat- pack table 6. pin functions (continued) watchdog timeout test point--do not use. (see note 3)* (input). test 1 60 r tfla g 62 input resets entire rt when low. reset 64 buffer enable-- input used to enable or tri-state the internal data bus buffers when they are dri- ving the bus. when low, the data bus buffers are enabled. could be connected to dt a ck , if rt is sharing the same data bus as the subsystem. (see note 2)*. b uf ena 66 16mhz clock input--input for the master clock used to run rtu circuits. 16mhz in 68 gbr 70 rd/wr 72 data transfer acknowledge-- active low out- put signal during data transfers to or from the subsystem indicating the rtu has received the dtgr t in response to dtreq and is present- ly doing the transfer. can be connected direct- ly to (b uf ena) for control of tri-state data buffers; and to tri-state address buffer control lines, if they are used. dt a ck 76 a4 (wc4/ cwc4) 74 57 70 63 71 59 69 61 68 63 67 65 66 67 65 69 64 62 73 func- tion 78- pin flat- pack description package & pin 82- pin flat- pack table 6. pin functions (continued) 78- pin qip 78- pin qip read/write - output signal controls direction of the internal data bus buffers (logic ? 1 ? = reading data via d15-d0; logic ? 0 ? = writing data via d15-d0). prior to reception of a 1553 com- mand word, rd/wr will be logic ? 0 ? ,indicating that the bu(s)-65142 is writing data to the con- nected subsystem.following the reception/ transfer of a transmit command word, rd/wr transitions from low to high,remains high until after the last data word is read from the system for transmission on the 1553 bus.after that last data word transfer,rd/wr returns to logic ? 0 ? . multiplexed address line output. when incmd is low or a5 thru a9 are all zeroes or all ones (mode command), it represents the latched output of the msb in the word count field of the command word. when incmd is high and a5 thru a9 are not all zeroes or all ones, it rep- resents the msb of the current word counter. good block received--low level output pulse (.5s) used to flag the subsystem that a valid, legal, non-mode receive command with the correct number of data words has been received without a message error and success- fully transferred to the subsystem. a0 (wco/ cswo) 78 75 61 multiplexed address line output. when incmd is low or a5 thru a9 are all zeroes or all ones (mode command), it represents the latched output of the lsb in the word count field of the command word. when incmd is high and a5 thru a9 are not all zeroes or all ones, it repre- sents the lsb of the current word counter. -15v/-12v input power supply connec- tion for the bus-65142/43/44/45 and bu-65142x1/2 b channel transceiver (no connection for bu-65142x3).
1.870 max (47.5) 1.500 (38) 1.800 (46) index denotes pin 1 2.100 max (53) 1.900 (48) 0.250 max (6.35) 0.100 typ (2.54) 0.250 0.010 (6.35 0.25) pin numbers for reference only 1.650 (42) 0.018 0.002 dia typ (0.46 0.05) 59 20 40 78 60 21 41 1 2 see detail "a" 0.050 typ (1.27) detail "a" note: dimensions are in inches (mm). figure 8. bus-65142/43 mechanical outline (standard product) (78-pin kovar qip ) 22 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 ssb usy 58 55 71 subsystem busy - input from the subsystem used to control the busy bit in the status regis- ter. if low when the status word is updated, the busy bit will be set, if high it will be cleared. if the busy bit is set in the status reg- ister, no data will be requested from the sub- system in response to a transmit command. on receive commands, data will be transferred to the subsystem. ssfla g 56 53 72 subsystem flag-- input from the subsystem used to control the subsystem flag bit in the status register. if low when the status word is updated, the subsystem flag will be set; if high it will be cleared. func- tion 78- pin flat- pack description package & pin 82- pin flat- pack table 6. pin functions (continued) 78- pin qip these pins are not used on this package. status word enable-- low level active output signal present when the status word is enabled on the parallel data bus. n/c st a ten 1,41, 42,82 44 low output to the primary side of the coupling transformer that connects to the a channel of the 1553 bus. txd a t a a 46 not connected. n/c 48 power supply return connection for the a channel transceiver. gnd a 50 input from the high side of the primary side of the coupling transformer that connects to the a channel of the 1553 bus. rxda- ta a 52 message error--output signal that goes low and stays low whenever there is a format or word error with the received message over the 1553 data bus. cleared by the next ngbt . me 54 _ 41 _ 78 43 77 45 76 47 75 49 74 73 51 pin function table notes(table 6) : 1. test 2 this pin provides the output of the bus-65142 bit comparison out- put. it indicates the loop test results for every word transmitted by the bus-65142. a test can be performed by actioning the rtu to transmit while the test fixture opens the receiver lines to force an error condition. a logic 1 (high) indicates the loop test passed. normally this pin is left open. 2. b ufena this pin is typically tied to dt a ck , causing the bus-65142 to drive the shared data bus only while dt a ck is active. if desired b ufena can be grounded. the data will remain latched on the data bus pins for 18s from dtrsb and 3.5s for the last word of a message as the device ? s status word or bit word is transferred to the bc (st a ten or biten low). once the status or bit word transfer is complete, the data bus will automatically again contain the last data word. the bus-65142 will automatically switch the direction of the internal buffers during a transmit operation. 3. test 1 this test allows the user to force the active channel to transmit indef- initely, in order to test the built in watchdog timer feature of the bus-65142. when this pin is grounded and the active channel is stimulated with a valid transmit command, the bus-65142 will respond with a status word and contiguous data (last data word loaded or status word if none is loaded) until the built-in time out occurs. normally this pin is left open or an optional pull-up can be used. 4. pins 1, 41, 42, 82 for bus-65144/45 82-pin flat pack, figure 9 are not connected (n/c). 5. -v a and -v b are not connected (n/c) for bu-65142x3.
23 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 0.400 (min) (typ) (10) 1.600 max (40.6) pin1 denoted by contrasting colored bead 0.095 (ref) (2.413) 2.190 max (55.6) 0.181 max (4.6) 0.080 (typ) (2.032) top view side view 0.010 0.002 (typ) (0.254 0.051) 0.015 0.003 (typ) (0.38 0.076) 40 eq.sp 0.050 2.000 (tol non-cum) (1.27 50.8) pin numbers are for ref only 182 41 42 note: dimensions are in inches (millimeters). figure 9. bus-65144/45 mechanical outline (standard product) (82-pin kovar flat pack) figure 10. bu-65142d mechanical outline (hi-rel radiation tolerant version (78-pin ceramic qip) 1.800 max (46) 1.500 (38) 1.800 (46) index denotes pin 1 2.100 max (53) 1.900 (48) 0.210 max (5.33) 0.100 typ (2.54) 0.250 0.010 (6.35 0.25) pin numbers for reference only 1.650 (42) 0.018 0.002 dia typ (0.46 0.05) 59 20 40 78 60 21 41 1 2 see detail "a" 0.050 typ (1.27) detail "a" note: dimensions are in inches (mm).
24 data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 38 eq. sp. @ 0.050 = 1.90 tol noncum (1.27 = 48.26) 0.400 min typ (10.16) 0.050 typ (1.27) 0.100 0.010 typ (2.54 0.25) 0.210 max (5.33) 39 40 1 78 1.800 max (45.72) notes: lead cluster to be centralized about case center line within 0.010. 2. dimensions are in inches (mm). 0.018 0.002 typ (0.46 0.05) see detail "a" detail "a" 1 pn 1 denoted by index tab on lead braze 2.100 max (53.34) 0.010 0.002 typ (0.25 0.05) pin numbers for reference only 1.824 max (46.32) 0.010 (0.254) 0.050 (1.27) typ 1 figure 11. bu-65142f mechanical outline (hi-rel / radiation tolerant version) (78-pin ceramic flat pack)
? 1015, table 1 burn-in a 2001 constant acceleration c 1010 temperature cycle a and c 1014 seal ? 2009, 2010, 2017, and 2032 inspection condition(s ) method(s) mil-std-883 test standard ddc processing ordering information bus-6514x- xx0x supplemental process requirements: s = pre-cap source inspection l = pull test q = pull test and pre-cap inspection k = one lot date code w = one lot date code and precap source y = one lot date code and 100% pull test z = one lot date code, precap source and 100% pull test blank = none of the above test criteria: 0 = none process requirements: 0 = standard ddc processing, no burn-in (see page xiii.) 1 = mil-prf-38534 compliant 2 = b* 3 = mil-prf-38534 compliant with pind testing 4 = mil-prf-38534 compliant with solder dip 5 = mil-prf-38534 compliant with pind testing and solder dip 6 = b* with pind testing 7 = b* with solder dip 8 = b* with pind testing and solder dip 9 = standard ddc processing with solder dip, no burn-in temperature grade/data requirements: 1 = -55 c to +125 c 2 = -40 c to +85 c 3 = 0 c to +70 c 4 = -55 c to +125 c with variables test data 5 = -40 c to +85 c with variables test data 8 = 0 c to +70 c with variables test data power supply and packaging 2 = -15 v 78-pin qip (see figure 8) 3 = -12 v 78-pin qip (see figure 8) 4 = -15 v 82-pin flat pack (see figure 9) 5 = -12 v 82-pin flat pack (see figure 9) 25 * standard ddc processing with burn-in and full temperature test: see table below. ordering information b u-65142 d1- 110x supplemental process requirements: s = pre-cap source inspection l = pull test q = pull test and pre-cap inspection k = one lot date code w = one lot date code and precap source y = one lot date code and 100% pull test z = one lot date code, precap source and 100% pull test blank = none of the above test criteria: 0 = none process requirements: 0 = standard ddc processing, no burn-in (see page xiii.) 1 = mil-prf-38534 compliant 2 = b* 3 = mil-prf-38534 compliant with pind testing 4 = mil-prf-38534 compliant with solder dip 5 = mil-prf-38534 compliant with pind testing and solder dip 6 = b* with pind testing 7 = b* with solder dip 8 = b* with pind testing and solder dip 9 = standard ddc processing with solder dip, no burn-in temperature grade/data requirements: 1 = -55 c to +125 c 2 = -40 c to +85 c 3 = 0 c to +70 c 4 = -55 c to +125 c with variables test data 5 = -40 c to +85 c with variables test data 8 = 0 c to +70 c with variables test data transceiver option: 1 =+5 volts and - 15 volts 2 =+5 volts and - 12 volts 3 = +5 volts (only) package options: d = 78-pin qip package (see figure 10) f = 78-pin flatpack (see figure 11) product type: bu-65142 = radiation tolerant remote terminal data device corporation www.ddc-web.com bu-65142 and bus-65142 series u-05/02-0 ( note: bus-65142 is not recommended for new design, use bu-61703/05 simple system rt for new designs.) ( consult the factory or local represetative for lead times.)
26 printed in the u.s.a data device corporation registered to iso 9001 file no. a5976 r e g i s t e r e d f i r m ? u the information in this data sheet is believed to be accurate; however, no responsibility is assumed by data device corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. specifications are subject to change without notice. u-05/02-0 105 wilbur place, bohemia, new york, u.s.a. 11716-2482 for technical support - 1-800-ddc-5757 ext. 7234 headquarters, n.y., u.s.a. - tel: (631) 567-5600 ext. 7234, fax: (631) 567-7358 southeast, u.s.a. - tel: (703) 450-7900, fax: (703) 450-6610 west coast, u.s.a. - tel: (714) 895-9777, fax: (714) 895-4988 united kingdom - tel: +44-(0)1635-811140, fax: +44-(0)1635-32264 ireland - tel: +353-21-341065, fax: +353-21-341568 france - tel: +33-(0)1-41-16-3424, fax: +33-(0)1-41-16-3425 germany - tel: +49-(0)8141-349-087, fax: +49-(0)8141-349-089 japan - tel: +81-(0)3-3814-7688, fax: +81-(0)3-3814-7689 world wide web - http://www.ddc-web.com


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